離開
進入《TAIPEI TIMES》 Kishida invites TSMC chair to meeting
Taiwan Semiconductor Manufacturing Co chairman Mark Liu speaks during the SEMICON Taiwan expo in Taipei on Sept. 23, 2020. Photo: Ritchie B. Tongo, EPA-EFE
RARE OCCASION: Although Japan is seeking to bolster its supply chain, it is unusual for the top executives of the world’s major semiconductor firms to meet in one place
/ Staff writer, with CNA
Taiwan Semiconductor Manufacturing Co （TSMC, 台積電） chairman Mark Liu （劉德音） has been invited to meet with Japanese Prime Minister Fumio Kishida in Japan, the world’s largest contract chipmaker said yesterday.
In a statement, TSMC said that Liu would today attend a meeting hosted by Kishida, but did not elaborate.
The confirmation came after international news media reported a day earlier that executives from several global semiconductor giants had been invited to attend discussions at the prime minister’s office.
The firms include TSMC, Micron Technology Inc, Applied Materials Inc, International Business Machines Corp, Intel Corp, Samsung Electronics Co and Belgium’s semiconductor research group Interuniversity Microelectronics Centre, reports said.
Nikkei Asia said it is unusual for top executives from global semiconductor heavyweights to gather in one place for such a meeting.
In addition to Kishida, who is focused on enhancing Japan’s economic security and aiming to bolster the country’s semiconductor supply chain, Japanese Minister of Economy, Trade and Industry Yasutoshi Nishimura, along with other senior Japanese officials, would attend the meeting, Nikkei said.
The executives are expected to outline their investment and business development plans in Japan, it said.
Japanese Chief Cabinet Secretary Hirokazu Matsuno said it is unlikely that a single country could achieve semiconductor supply chain resilience, and it is important to work together with like-minded nations and regions to reach such a goal, Reuters reported.
The meeting comes as Washington is increasingly urging its allies to work together to address challenges from China in semiconductors and other areas of technological development, Reuters said.
TSMC is building a wafer fab in Kumamoto, Japan, with commercial production planned for next year to use its 12-nanometer, 16-nanometer and 28-nanometer processes.
In March 2021, the company established the TSMC Japan 3DIC R&D Center, a subsidiary in the Tsukuba Center of the National Institute of Advanced Industrial Science and Technology to develop high-end integrated circuit packaging and testing services with the aim of providing a one-stop service to customers using the chipmaker’s advanced chips.
The Japanese research-and-development center inaugurated a clean room facility in June last year.
TSMC said that the technologies developed by the subsidiary would enable system-level innovations to enhance computing performance and integrate more functionality, which is expected to facilitate new ways to drive semiconductor technology forward, beyond the industry’s conventional path of shrinking transistor size.
新聞來源：TAIPEI TIMES
