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進入《TAIPEI TIMES》 TSMC unveils layout of Arizona fab
Taiwan Semiconductor Manufacturing Co chief executive officer C.C. Wei speaks at the company’s annual technology symposium online yesterday. Photo: Grace Hung, Taipei Times
EXPANSION DRIVE: To expedite manufacturing of advanced chips, the chipmaker would transform domestic research centers into initial production facilities, TSMC said
By Lisa Wang / Staff reporter
Taiwan Semiconductor Manufacturing Co （TSMC, 台積電） yesterday unveiled the layout of its new fab in Arizona and reiterated its determination to ramp up advanced 5-nanometer chip production in 2024.
The company said that construction of Fab 21, in which it would invest US$10 billion to US$12 billion, has begun on a 445 hectare plot in Phoenix.
“As we expect demand for 5-nanometer [chips] will be strong and sustainable in the long term, we have made the Arizona fab, Fab 21, one of the 5-nanometer manufacturing sites,” TSMC chief executive officer C.C. Wei （魏哲家） told the company’s annual technology symposium.
The chipmaker has shipped more than 500,000 5-nanometer chips from its Fab 18 in Tainan since the technology became available last year, thanks to robust customer demand for smartphones, 5G applications, artificial-intelligence （AI） applications, networking devices and high-performance computing devices, Wei said.
The first phase of the Arizona fab would have an installed capacity of 20,000 wafers a month, TSMC said.
In January, the chipmaker said that further expansion would depend on market conditions and US government support.
TSMC yesterday introduced the technology for its new N5A process to produce 5-nanometer chips for automotive applications such as AI-enabled driver assistance and the digitization of vehicle cockpits.
Production using the N5A process is scheduled to be available in the third quarter of next year, Wei said.
The chipmaker said that its 3-nanometer technology would be the world’s most advanced technology when volume production begins in the second half of next year.
Its fabs in Tainan would be its major manufacturing sites for 3-nanometer chips, TSMC said.
To expedite mass production of 3-nanometer and 2-nanometer chips, TSMC is transforming its 2-nanometer research centers in Hsinchu into sites for initial production of new-generation chips, it said.
TSMC in 2018 forecast that its advanced technology capacity would expand at a compound annual rate of 30 percent from 2018 to this year.
At the time, it predicted that 7-nanometer chip capacity would until this year have increased fourfold, TSMC senior vice president Y.P. Chin （秦永沛） told the symposium.
Five-nanometer chip capacity would quadruple until 2023 from last year’s level, he said.
The company is also expanding its advanced chip testing and packaging capacity to cope with growing demand, Chin said.
TSMC is building its fifth fab in Miaoli County’s Jhunan Township （竹南）, which would offer the most advanced 3D packaging technology of system-on-integrated-chip in the second half of next year, he said.
新聞來源：TAIPEI TIMES
